设计了一款应用于有源相控阵雷达T/R组件的X波段功率放大器,放大器采用单端两级放大的共源共栅结构,包括输入与输出匹配网络,偏置电路采用自适应线性化技术,实现高增益和高线性的输出。基于IBM 0.18μm Si Ge Bi CMOS 7WL工艺流片,测试结果表明,在3.3 V电源电压下,在8.5 GHz时增益为21.8 d B,1 d B压缩点输出功率为10.4 d Bm,输入输出匹配良好,芯片面积为1.4 mm×0.8 mm。芯片面积较小,实现了与整个T/R芯片的集成。
A fully integrated 60-GHz transceiver for 802.11ad applications with superior performance in a 90-nm CMOS process versus prior arts is proposed and real based on a field-circuit co-design methodology.The reported transceiver monolithically integrates a receiver,transmitter,PLL(Phase-Locked Loop)synthesizer,and LO(Local Oscillator)path based on a sliding-IF architecture.The transceiver supports up to a 16QAM modulation scheme and a data rate of 6 Gbit/s per channel,with an EVM(Error Vector Magnitude)of lower than−20 dB.The receiver path achieves a configurable conversion gain of 36~64 dB and a noise figure of 7.1 dB over 57~64 GHz,while consuming only 177 mW of power.The transmitter achieves a conversion gain of roughly 26 dB,with an output P1dB of 8 dBm and a saturated output power of over 10 dBm,consuming 252 mW of power from a 1.2-V supply.The LO path is composed of a 24-GHz PLL,doubler,and a divider chain,as well as an LO distribution network.In closed-loop operation mode,the PLL exhibits an integrated phase error of 3.3ºrms(from 100 kHz to 100 MHz)over prescribed frequency bands,and a total power dissipation of only 26 mW.All measured results are rigorously loyal to the simulation.
设计了一款应用于相控阵雷达系统,工作频段8 GHz^12 GHz,中心频率为10 GHz的5位数字移相器,该移相器采用UMC 0.18μm标准CMOS工艺设计实现.五位移相单元分别为11.25°、22.5°、45°、90°和180°,其中180°移相单元采用高-低通滤波器型结构,其余移相单元采用低通π型滤波器结构.通过合理选择参数模型和拓扑结构,优化版图布局设计,实现了电路性能并给出仿真结果.在工作频率范围内,32种移相状态的相位均方根误差<1.08°,幅度均方根误差<1.14 d B,插入损耗值保持在14 d B^20 d B范围内,版图尺寸为2.85×1.15 mm2.
This paper presents a millimeter wave(mm-wave) oscillator that generates signal at 36.56 GHz. The mm-wave oscillator is realized in a UMC 0.18 m CMOS process. The linear superposition(LS) technique breaks through the limit of cut-off frequency(fT/, and realizes a much higher oscillation than fT. Measurement results show that the LS oscillator produces a calibrated –37.17 dBm output power when biased at 1.8 V; the output power of fundamental signal is –10.85 dBm after calibration. The measured phase noise at 1 MHz frequency offset is–112.54 dBc/Hz at the frequency of 9.14 GHz. This circuit can be properly applied to mm-wave communication systems with advantages of low cost and high integration density.
