A reconfigurable multi-mode multi-band transceiver for low power short-range wireless communication applications is presented.Its low intermediate frequency(IF) receiver with 3 MHz IF carrier frequency and the direct-conversion transmitter support reconfigurable signal bandwidths from 250 kHz to 2 MHz and support a highest data rate of 3 Mbps for MSK modulation.An integrated multi-band PLL frequency synthesizer is utilized to provide the quadrature LO signals from about 300 MHz to 1 GHz for the transceiver multi-band application. The transceiver has been implemented in a 0.18μm CMOS process.The measurement results at the maximum gain mode show that the receiver achieves a noise figure(NF) of 4.9/5.5 dB and an input 3rd order intermodulation point(IIP3) of-19.6/-18.2 dBm in 400/900 MHz band.The transmitter working in 400/900 MHz band can deliver 10.2/7.3 dBm power to a 50Ωload.The transceiver consumes 32.9/35.6 mW in receive mode and 47.4/50.1 mW in transmit mode in 400/900 MHz band,respectively.
Modeling of Schottky diodes in the CMOS process is a key step in ultra-high frequency （UHF） ra- dio frequency identification （RFID） transponder designs. Accurate Schottky diode models need both DC and RF models. Conventional DC models of the Schottky diode fail to predict the forward leakage current, which is crucial for precise simulation results. This paper presents a Schottky diode model with an additional diode which gives the correct forward leakage current. The RF model of the Schottky diode is constructed based on the measured S-parameters. Then, an on-chip de-embedding process is needed to remove the parasitics due to the pads and interconnection lines in the S-parameter test. A flexible ＂open-through＂ on-chip de-embedding method is proposed which only requires an ＂open＂ dummy and a ＂through＂ dummy, with all the lumped and distributed parasitics equivalent to two-port networks to give sufficient high-frequency de-embedding accuracy. By the help of this de-embedding method and the new DC model, the accuracy of the established diode model could be guaranteed. The Schottky diode model is verified by comparison between measurements and simulations and successfully applied to an RFID transponder design.
A reconfigurable analog baseband circuit for WLAN,WCDMA,and Bluetooth in 0.35μm CMOS is presented. The circuit consists of two variable gain amplifiers（VGA） in cascade and a Gm-C elliptic low-pass filter（LPF）. The filter-order and the cut-off frequency of the LPF can be reconfigured to satisfy the requirements of various applications. In order to achieve the optimum power consumption,the bandwidth of the VGAs can also be dynamically reconfigured and some Gm cells can be cut off in the given application.Simulation results show that the analog baseband circuit consumes 16.8 mW for WLAN,8.9 mW for WCDMA and only 6.5 mW for Bluetooth,all with a 3 V power supply.The analog baseband circuit could provide -10 to ＋40 dB variable gain,third-order low pass filtering with 1 MHz cut-off frequency for Bluetooth,fourth-order low pass filtering with 2.2 MHz cut-off frequency for WCDMA, and fifth-order low pass filtering with 11 MHz cut-off frequency for WLAN,respectively.
A dual-band reconfigurable wireless receiver RF front-end is presented, which is based on the directconversion principle and consists of a low noise amplifer （LNA） and a down-converter. By utilizing a compact switchable on-chip symmetrical inductor, the RF front-end could be switched between two operation frequency bands without extra die area cost. This RF front-end has been implemented in the 180 nm CMOS process and the measured results show that the front-end could provide a gain of 25 dB and IIP3 of 6 dBm at 2.2 GHz, and a gain of 18.8 dB and IIP3 of 7.3 dBm at 4.5 GHz. The whole front-end consumes 12 mA current at 1.2 V voltage supply for the LNA and 2.1 mA current at 1.8 V for the mixer, with a die area of 1.2 × 1 mm^2.
