In spite of their extraordinary performance, AlGaN/GaN high electron mobility transistors （HEMTs） still lack solid reliability. Devices under accelerated DC stress tests （off-state, VDS = 0 state, and on-state step-stress） are investigated to help us identify the degradation mechanisms of the AlGaN/GaN HEMTs. All our findings are consistent with the degradation mechanism based on crystallographic-defect formation due to the inverse piezoelectric effects in Ref. [1] （Joh J and del Alamo J A 2006 IEEE IDEM Tech. Digest p. 415）. However, under the on-state condition, the devices are suffering from both inverse piezoelectric effects and hot electron effects, and so to improve the reliability of the devices both effects should be taken into consideration.
This paper presents a 65-nm 1-Gb NOR-type floating-gate flash memory,in which the cell device and chip circuit are developed and optimized.In order to solve the speed problem of giga-level NOR flash in the deep submicron process,the models of long bit-line and word-line are first given,by which the capacitive and resistive loads could be estimated.Based on that,the read path and key modules are optimized to enhance the chip access property and reliability.With the measurement results,the flash memory cell presents good endurance and retention properties,and the macro is operated with 1-ls/byte program speed and less than 50-ns read time under 3.3 V supply.
Various aluminum-doped zinc oxide （AZO） films were prepared on Si substrate by atomic layer de- position （ALD） at 100 ℃. The effect of the composition of AZO films on their electrical, optical characteristics, structural property and surface topography was investi- gated. The appearance of electrical resistivity shows their semiconducing properties. In most of the visible light band, all the AZO films present transparency of more than 80 %. A1 doping suppresses the AZO film crystallization. When the A1 doping concentration increases up to 3.95 at%, the AZO film has some small multicrystal grains with random orientation. A1 doping improves the roughness of i-ZnO film. The root mean square （RMS） roughness of samples prepared by ALD is much smaller than that pre- pared by radio-frequency magnetron sputtering reported.
Fei-Long ZhaoJun-Chen DongNan-Nan ZhaoJing WuDe-Dong HanJin-Feng KangYi Wang
Rare earth element gadolinium-doped aluminum–zinc oxide（Gd–AZO） semiconductor thin film material was deposited on both silicon and glass substrate by radio frequency（RF） sputtering at room temperature.Electrical properties and microstructure of Gd–AZO thin film were mainly modulated by altering O2 partial pressure（OPP） during the RF sputtering process.Scanning electron microscope（SEM） and X-ray diffraction（XRD） test were carried out to uncover the microstructure variation trend with the sputtering OPP,and amorphous structure which is beneficial to large mass industry manufacture was also demonstrated by the XRD pattern.Transmittance in visible light spectrum implies the potential application for Gd–AZO to be used in transparent material field.Finally,bottom gate,top contact device structure thin film transistors（TFTs） with Gd–AZO thin film as the active channel layer were fabricated to verify the semiconductor availability of Gd–AZO thin film material.Besides,the Gd–AZO TFTs exhibit preferable transfer and output characteristics.
Jun-Chen DongDe-Dong HanFei-Long ZhaoNan-Nan ZhaoJing WuLi-Feng LiuJin-Feng KangYi Wang
As a connection between the process and the circuit design, the device model is greatly desired for emerging devices, such as the double-gate MOSFET. Time efficiency is one of the most important requirements for device modeling. In this paper, an improvement to the computational efficiency of the drain current model for double-gate MOSFETs is extended, and different calculation methods are compared and discussed. The results show that the calculation speed of the improved model is substantially enhanced. A two-dimensional device simulation is performed to verify the improved model. Furthermore, the model is implemented into the HSPICE circuit simulator in Verilog-A for practical application.
The electrode effect of resistive switching memory devices on resistive switching behaviors is studied.Compared to TiN-or Ti-electrode devices,significantly reduced switching parameters such as resistance-ratio of high-and low-resistance states and set-voltage are observed experimentally in the Al-electrode devices when a positive voltage bias is applied to the Al-electrode during the forming process.An electric-field induced metal-ion-migration effect is proposed to elucidate the observed electrode dependence of the resistive switching behaviors in the resistive switching memory devices.The further measured data identify the validity of the proposed mechanism.
With the merits of a simple process and a short fabrication period, the capacitor structure provides a convenient way to evaluate memory characteristics of charge trap memory devices. However, the slow minority carrier generation in a capacitor often makes an underestimation of the program/erase speed. In this paper, illumination around a memory capacitor is proposed to enhance the generation of minority carriers so that an accurate measurement of the program/erase speed can be achieved. From the dependence of the inversion capacitance on frequency, a time constant is extracted to quantitatively characterize the formation of the inversion layer. Experimental results show that under a high enough illumination, this time constant is greatly reduced and the measured minority carrier-related program/erase speed is in agreement with the reported value in a transistor structure.
We introduce a novel 2 T P-channel nano-crystal memory structure for low power and high speed embedded non-volatile memory（NVM） applications.By using the band-to-band tunneling-induced hot-electron （BTBTIHE） injection scheme,both high-speed and low power programming can be achieved at the same time. Due to the use of a select transistor,the ＂erased states＂ can be set to below 0 V,so that the periphery HV circuit （high-voltage generating and management） and read-out circuit can be simplified.Good memory cell performance has also been achieved,including a fast program/erase（P/E） speed（a 1.15 V memory window under 10μs program pulse）,an excellent data retention（only 20%charge loss for 10 years）.The data shows that the device has strong potential for future embedded NVM applications.
