Phase change random access memory （PCRAM） is one of the best candidates for next generation non- volatile memory, and phase change SiESbETe5 material is expected to be a promising material for PCRAM. In the fabrication of phase change random access memories, the etching process is a critical step. In this paper, the etching characteristics of Si2Sb2Te5 films were studied with a CF4/Ar gas mixture using a reactive ion etching system. We observed a monotonic decrease in etch rate with decreasing CF4 concentration, meanwhile, Ar concentration went up and smoother etched surfaces were obtained. It proves that CF4 determines the etch rate while Ar plays an im- portant role in defining the smoothness of the etched surface and sidewall edge acuity. Compared with GeESbETe5, it is found that Si2Sb2Te5 has a greater etch rate. Etching characteristics of Si2SbETe5 as a function of power and pressure were also studied. The smoothest surfaces and most vertical sidewalls were achieved using a CF4/Ar gas mixture ratio of 10/40, a background pressure of 40 mTorr, and power of 200 W.
The dry etching characteristic of AlSbTe film was investigated by using a CF/Ar gas mixture.The experimental control parameters were gas flow rate into the chamber,CF/Ar ratio,the Oaddition,the chamber background pressure,and the incident RF power applied to the lower electrode.The total flow rate was 50 sccm and the behavior of etch rate of AlSbTe thin films was investigated as a function of the CF/Ar ratio,the Oaddition,the chamber background pressure,and the incident RF power.Then the parameters were optimized.The fast etch rate was up to 70.8 nm/min and a smooth surface was achieved using optimized etching parameters of CFconcentration of 4%,power of 300 W and pressure of 80 mTorr.
A fully integrated low-jitter, precise frequency CMOS phase-locked loop （PLL） clock for the phase change memory （PCM） drive circuit is presented. The design consists of a dynamic dual-reset phase frequency detector （PFD） with high frequency acquisition, a novel low jitter charge pump, a CMOS ring oscillator based voltage-controlled oscillator （VCO）, a 2nd order passive loop filter, and a digital frequency divider. The design is fabricated in 0.35 #m CMOS technology and consumes 20 mW from a supply voltage of 5 V. In terms of the PCM＇s program operation requirement, the output frequency range is from 1 to 140 MHz. For the 140 MHz output frequency, the circuit features a cycle-to-cycle jitter of 28 ps RMS and 250 ps peak-to-peak.
Phase change memory （PCM） has been regarded as a promising candidate for the next generation of nonvolatile memory. To decrease the power required to reset the PCM cell, titanium nitride （TIN） is preferred to be used as the bottom electrode of PCM due to its low thermal and suitable electrical conductivity. However, during the manufacture of PCM cell in 40 nm process node, abnormally high and discrete distribution of the resistance of TiN bottom electrode was found, which might be induced by the surface oxidation of TiN bottom electrode during the photoresist ashing process by oxygen plasma. In this work, we have studied the oxidation of TiN and found that with the increasing oxygen plasma ashing time, the thickness of the TiO2 layer became thicker and the state of the TiO2 layer changed from amorphous to crystalline, respectively. The resistance of TiN electrode contact chain with 4-5 nm TiO2 layer was confirmed to be almost three-orders of magnitude higher than that of pure TiN electrode, which led to the failure issue of PCM cell. We efficiently removed the oxidation TiO2 layer by a chemical mechanical polishing （CMP） process, and we eventually recovered the resistance of TiN bottom electrode from 1×10^5Ω/via back to 6×10^2 Ωvia and successfully achieved a uniform resistance distribution of the TiN bottom electrode.
A low ripple switched capacitor charge pump applicable to phase change memory （PCM） is presented. For high power efficiency, the selected charge pump topology can automatically change the power conversion ratio between 2X/1.5X modes with the input voltage. For a low output ripple, a novel operation mode is used. Compared with the conventional switched capacitor charge pump, the flying capacitor of the proposed charge pump is charged to Vo- 14n during the charge phase （Vo is the prospective output voltage）. In the discharge phase, the flying capacitor is placed in series with the Vin to transfer energy to the output, so the output voltage is regulated at Vo. A simulation was implemented for a DC input range of 1.6-2.1 V in on SMIC standard 40 nm CMOS process, the result shows that the new operation mode could regulate the output of about 2.5 V with a load condition from 0 to 10 mA, and the ripple voltage is lower than 4 mV. The maximum power efficiency reaches 91%.
Chemical mechanical planarization（CMP） of amorphous Ge_2Sb_2Te_5（a-GST） is investigated using two typical soft pads（politex REG and AT） in acidic slurry.After CMP,it is found that the removal rate（RR） of a-GST increases with an increase of runs number for both pads.However,it achieves the higher RR and better surface quality of a-GST for an AT pad.The in-situ sheet resistance（R_s） measure shows the higher R_s of a-GST polishing can be gained after CMP using both pads and the high R_s is beneficial to lower the reset current for the PCM cells. In order to find the root cause of the different RR of a-GST polishing with different pads,the surface morphology and characteristics of both new and used pads are analyzed,it shows that the AT pad has smaller porosity size and more pore counts than that of the REG pad,and thus the AT pad can transport more fresh slurry to the reaction interface between the pad and a-GST,which results in the high RR of a-GST due to enhanced chemical reaction.
