An ultra-wideband (3.1-10.6 GHz) low-noise amplifier using the 0.18 μm CMOS process is presented. It employs a wideband filter for impedance matching. The current-reused technique is adopted to lower the power consumption. The noise contributions of the second-order and third-order Chebyshev filers for input matching are analyzed and compared in detail. The measured power gain is 12.4-14.5 dB within the bandwidth. NF ranged from 4.2 to 5.4 dB in 3.1-10.6 GHz. Good input matching is achieved over the entire bandwidth. The test chip consumes 9 mW (without output buffer for measurement) with a 1.8 V power supply and occupies 0.88 mm2.
Although the design of many kinds of microprocessors has been under developing for several decades,the computer architecture R&D community lacks well documented lessons and experiences about design decisions in the research literature.In this paper,we systematically present the design decisions we made during the designing and prototyping of Godson-2 series processors.The 250MHz Godson-2B,450MHz Godson-2C,and 1GHz Godson-2E processors that implement 64-bit,four-issue,out-of-order architecture were taped out in 2003,2004,and 2005,respectively.Each processor triples its predecessor in the SPEC CPU2000 rates.Our first-hand experiences and lessons gained from these designs would provide unique perspectives and insights that are not available in any existing text books and/or published papers.We summarize 10 critical lessons and experiences based on hundreds of our attempts at architectural and design optimizations for performance improvement of Godson-2 series processors.The issues include silicon-simulation correlation,design balancing,performance optimizing,and pico-architecture tuning.We conclude that persistent improvement,attitude towards work-on-silicon design, and insightful understanding of software and fabrication process are the three most important factors for designing a high performance processor with low energy consumption.
