A two-dimensional analytical subthreshold behavior model for junctionless dual-material cylindrical surroundinggate(JLDMCSG) metal-oxide-semiconductor field-effect transistors(MOSFETs) is proposed. It is derived by solving the two-dimensional Poisson's equation in two continuous cylindrical regions with any simplifying assumption. Using this analytical model, the subthreshold characteristics of JLDMCSG MOSFETs are investigated in terms of channel electrostatic potential, horizontal electric field, and subthreshold current. Compared to junctionless single-material cylindrical surrounding-gate MOSFETs, JLDMCSG MOSFETs can effectively suppress short-channel effects and simultaneously improve carrier transport efficiency. It is found that the subthreshold current of JLDMCSG MOSFETs can be significantly reduced by adopting both a thin oxide and thin silicon channel. The accuracy of the analytical model is verified by its good agreement with the three-dimensional numerical simulator ISE TCAD.
Using an exact solution of two-dimensional Poisson’s equation in cylindrical coordinates,a new analytical model comprising electrostatic potential,electric field,threshold voltage and subthreshold current for halodoped surrounding-gate MOSFETs is developed.It is found that a new analytical model exhibits higher accuracy than that based on parabolic potential approximation when the thickness of the silicon channel is much larger than that of the oxide.It is also revealed that moderate halo doping concentration,thin gate oxide thickness and small silicon channel radius are needed to improve the threshold voltage characteristics.The derived analytical model agrees well with a three-dimensional numerical device simulator ISE.
This paper presents an improved merged architecture for a low-IF GNSS receiver frontend,where the bias current and functions are reused in a stacked quadrature LNA-mixer-VCO.Only a single spiral inductor is implemented for the LC resonator and an extra 1/2 frequency divider is added as the quadrature LO signal generator. The details of the design are presented.The gain plan and noise figure are discussed.The phase noise,quadrature accuracy and power consumption are improved.The test chip is fabricated though a 0.18μm RF CMOS process. The measured noise figure is 5.4 dB on average,with a gain of 43 dB and a IIP3 of-39 dBm.The measured phase noise is better than -105 dBc/Hz at 1 MHz offset.The total power consumption is 19.8 mW with a 1.8 V supply. The experimental results satisfy the requirements for GNSS applications.
Based on the quasi-two-dimensional （2D） solution of Poisson＇s equation in two continuous channel regions, an an- alytical threshold voltage model for short-channel junctionless dual-material cylindrical surrounding-gate （JLDMCSG） metal-oxide-semiconductor field-effect transistor （MOSFET） is developed. Using the derived model, channel potential dis- tribu6o~, h~riz~atal electrical ~eld distributign, a~d threshold v~ltage roll-off of ~LDMCSG MOSFET are in,instigated. Compared with junctionless single-material CSG （JLSGCSG） MOSFET~ JLDMCSG MOSFET can effectively suppress short-channel effects and simultaneously improve carrier transport efficiency. It is also revealed that threshold voltage roll- off of JLDMCSG can be significantly reduced by adopting both a small oxide thickness and a small silicon channel radius. The model is verified by comparing its calculated results with that obtained from three-dimensional （3D） numerical device simulator ISE.
