We have investigated the effect of post deposition annealing (PDA) temperature of Al2O3 blocking layer on the performance of charge trapping memory capacitors. Two splits of PDA were performed in N2 ambient at 850°C/60 s and 1050°C/60 s, respectively. The 1050°C annealed capacitor could be programmed and erased normally by using Fowler-Nordheim (FN) injection. In contrast, the 850°C annealed device could not be erased, even though it could be programmed properly. By measuring the gate leakage current and the flatband voltage shift, we found the erase failure in the 850°C annealed device was due to a larger gate back-injection leakage current at Vg<0. The trend of gate leakage current was further verified in two Al/Al2O3/SiO2/p-Si control capacitors with the same PDA splits. In addition, constant voltage stress measurements on control capacitors in the FN regime showed that the change of gate leakage current followed an empirical Curie-von Schweidler law at Vg<0. The data pointed out the importance to further study the relation between PDA conditions and the defect generation properties in Al2O3 blocking layer.
JIN LinZHANG ManHongHUO ZongLiangYU ZhaoAnJIANG DanDanWANG YongBAI JieCHEN JunNingLIU Ming
In this paper, a WO3-based resistive random access memory device composed of a thin film of WO3 sandwiched between a copper top and a platinum bottom electrodes is fabricated by electron beam evaporation at room temperature. The reproducible resistive switching, low power consumption, multilevel storage possibility, and good data retention characteristics demonstrate that the Cu/WO3/Pt memory device is very promising for future nonvolatile memory applications. The formation and rupture of localised conductive filaments is suggested to be responsible for the observed resistive switching behaviours.
We introduce a novel 2 T P-channel nano-crystal memory structure for low power and high speed embedded non-volatile memory(NVM) applications.By using the band-to-band tunneling-induced hot-electron (BTBTIHE) injection scheme,both high-speed and low power programming can be achieved at the same time. Due to the use of a select transistor,the "erased states" can be set to below 0 V,so that the periphery HV circuit (high-voltage generating and management) and read-out circuit can be simplified.Good memory cell performance has also been achieved,including a fast program/erase(P/E) speed(a 1.15 V memory window under 10μs program pulse),an excellent data retention(only 20%charge loss for 10 years).The data shows that the device has strong potential for future embedded NVM applications.
We report on a micro-Raman investigation of inducing defects in mono-layer, hi-layer and tri-layer graphene by γ ray radiation. It is found that the radiation exposure results in two-dimensional (2D) and G band position evolution with the layer number increasing and D and D~ bands rising, suggesting the presence of defects and related crystal lattice deformation in graphene. Bi-layer graphene is more stable than mono- and tri-layer graphene, indicating that the former is a better candidate in the application of radiation environments. Also, the DC electrical property of the mono-layer graphene device shows that the defects increase the carrier density.
Resistive random access memory(RRAM) with crossbar structure is receiving widespread attentions due to its simple structure,high density,and feasibility of three-dimensional(3D) stack.It is an extremely promising solution for high density storage.However,a major issue of crosstalk restricts its development and application.In this paper,we will first introduce the integration methods of RRAM device and the existing crosstalk phenomenon in passive crossbar array,and then focus on the 1D1R(one diode and one resistor) structure and self-rectifying 1R(one resistor) structure which can restrain crosstalk and avoid misreading for the passive crossbar array.The test methods of crossbar array are also presented to evaluate the performances of passive crossbar array to achieve its commercial application in comparison with the active array consisting of one transistor and one RRAM cell(1T1R) structure.Finally,the future research direction of rectifying-based RRAM passive crossbar array is discussed.