A multi-channel, fully differential programmable chip for neural recording application is presented. The integrated circuit incorporates eight neural recording amplifiers with tunable bandwidth and gain, eight 4thorder Bessel switch capacitor filters, an 8-to-1 analog time-division multiplexer, a fully differential successive approximation register analog-to-digital converter （SAR ADC）, and a serial peripheral interface for communication. The neural recording amplifier presents a programmable gain from 53 dB to 68 dB, a tunable low cut-off frequency from 0.1 Hz to 300 Hz, and 3.77μVrms input-referred noise over a 5 kHz bandwidth. The SAR ADC digitizes signals at maximum sampling rate of 20 μS/s per channel and achieves an ENOB of 7.4. The integrated circuit is designed and fabricated in 0.18-μm CMOS mix-signal process. We successfully performed a multi-channel in-vivo recording experiment from a rat cortex using the neural recording chip.
A design for a CMOS frontend integrated circuit （chip） for neural signal acquisition working at wide voltage supply range is presented in this paper. The chip consists of a preamplifier, a serial instrumental amplifier （IA） and a cyclic analog-to-digital converter （CADC）. The capacitive-coupled and capacitive-feedback topology combined with MOS-bipolar pseudo-resistor element is adopted in the preamplifier to create a -3 dB upper cut-off frequency less than 1 Hz without using a ponderous discrete device. A dual-amplifier instrumental amplifier is used to provide a low output impedance interface for ADC as well as to boost the gain. The preamplifier and the serial instrumental amplifier together provide a midband gain of 45.8 dB and have an input-referred noise of 6.7 μVrms integrated from 1 Hz to 5 kHz. The ADC digitizes the amplified signal at 12-bits precision with a highest sampling rate of 130 kS/s. The measured effective number of bits （ENOB） of the ADC is 8.7 bits. The entire circuit draws 165 to 216 μA current from the supply voltage varied from 1.34 to 3.3 V. The prototype chip is fabricated in the 0.18-μm CMOS process and occupies an area of 1.23 mm2 （including pads）. In-vitro recording was successfully carried out by the proposed frontend chip.
We experimentally demonstrate a high-speed phosphorescent white light emitting diode （LED） visible light communication （VLC） system without utilizing an optical blue filter. Here, the white light response is equalized by using the proposed analog equalizers. The 3 dB bandwidth of the VLC link could be extended from 3 to 132 MHz, which allows 330 Mbit/s non-return-to-zero on-off keying （NRZ-OOK） data transmission with a bit error ratio （BER） of 7,2 × 10^-10 and 672 Mbit/s 64-quadrature amplitude modulation （64-QAM） data transmission with a BER of 3.2 × 10^-3. These resultant BERs are less than the forward error correction （FEC） limit of 3.8× 10^-3. The VLC link distance is 1 m using a single 1 W LED. The transmitter and receiver modules are integrated to a compact size. Furthermore, the relationships between the signal performance and illumination level or optical power are investigated and analyzed.
The prefrontal cortex is implicated in cognitive functioning and schizophrenia. Prefrontal dysfunction is closely associated with the symptoms of schizophrenia. In addition to the features typical of schizophrenia, patients also present with aspects of cognitive disorders. Based on these relationships, a monkey model mimicking the cognitive symptoms of schizophrenia has been made using treatment with the non-specific competitive N-methyI-D-aspartate receptor antagonist, phencyclidine. The symptoms are ameliorated by atypical antipsychotic drugs such as clozapine. The beneficial effects of clozapine on behavioral .impairment might be a specific indicator of schizophrenia-related cognitive impairment.
A novel linear microprobe array(LMPA)has been developed by a conventional microfabrication method from silicon.The LMPA leverages the properties of conventional microwire with additional features of naturally formed regular spacing.With the help of periodic microprobe arrays and double-side V-grooves fabricated in advance between each pair of the two microprobes’rear ends,the number of microprobe units for assembly in one array can be flexibly chosen by cleavage fracture from the LMPA.The fabrication method was demonstrated and the prototype device was assessed by electrochemical impedance spectroscopy(EIS)and in vivo test.The SNR of the spikes recorded was 6.
ZHAO Shan ShanPEI Wei HuaZHAO HuiWANG Yi JunCHEN San YuanCHEN Yuan FangZHANG HeGUO Dong MeiGUI QiangCHEN Hong Da
This paper present a highly-integrated neurostimulator with an on-chip inductive power-recovery fron- tend and high-voltage stimulus generator. In particular, the power-recovery frontend includes a high-voltage full- wave rectifier （up to 100 V AC input）, high-voltage series regulators （24/5 V outputs） and a linear regulator （1.8/ 3.3 V output） with bandgap voltage reference. With the high voltage output of the series regulator, the proposed neurostimulator could deliver a considerably large current in high electrode-tissue contact impedance. This neu- rostimulator has been fabricated in a CSMC 1 μm 5/40/700 V BCD＇process and the total silicon area including pads is 5.8 mm2. Preliminary tests are successful as the neurostimulator shows good stability under a 13.56 MHz AC supply. Compared to previously reported works, our design has advantages of a wide induced voltage range （26-100 V）, high output voltage （up to 24 V） and high-level integration, which are suitable for implantable neu- rostimulators.
We present a high-speed visible light communication （VLC） link that uses a commercially available phos- phorescent white light-emitting diode （LED）. Such devices have few megahertz bandwidth due to the slow response of phosphorescent component, which severely limit the transmission data rate of VLC system. We propose a simple pre-emphasis circuit. With blue-filtering and the pre-emphasis circuit, the bandwidth of VLC system can be enhanced from 3 to 77.6 MHz, which allows non-return-to-zero on-off-keying （NRZ- OOK） data transmission up to 200 Mb/s with the bit error ratio of 5.3 × 10-7 which is below 10-6. The VLC link operates at the room illumination level of -1000 lx at 1.1 m range using a single 1 W white LED.
