In metal-gate/high-k stacks adopted by the 45 nm technology node,the flat-band voltage (V fb) shift remains one of the most critical challenges,particularly the flat-band voltage roll-off (V fb roll-off) phenomenon in p-channel metaloxide-semiconductor (pMOS) devices with an ultrathin oxide layer.In this paper,recent progress on the investigation of the V fb shift and the origin of the V fb roll-off in the metal-gate/high-k pMOS stacks are reviewed.Methods that can alleviate the V fb shift phenomenon are summarized and the future research trend is described.
Although metal gate/high-k stacks are commonly used in metal-oxide-semiconductor field-effect-transistors (MOSFETs) in the 45 nm technology node and beyond,there are still many challenges to be solved.Among the various technologies to tackle these problems,interface dipole engineering (IDE) is an effective method to improve the performance,particularly,modulating the effective work function (EWF) of metal gates.Because of the different electronegativity of the various atoms in the interfacial layer,a dipole layer with an electric filed can be formed altering the band alignment in the MOS stack.This paper reviews the interface dipole formation induced by different elements,recent progresses in metal gate/high-k MOS stacks with IDE on EWF modulation,and mechanism of IDE.
HUANG AnPingZHENG XiaoHuXIAO ZhiSongWANG MeiDI ZengFengCHU Paul K
